Logic synthesis has become a fundamental component of the ASIC design flow, and Logic Synthesis Using Synopsys® has been written for all those who dislike read

This book provides the most up-to-date coverage using the Synopsys program in the design of integrated circuits. The incorporation of "synthesis tools" is the m

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and th

This book describes RTL design, synthesis, and timing closure strategies for SOC blocks. It covers high-level RTL design scenarios and challenges for SOC design

This book describes advanced concepts and techniques for ASIC chip synthesis, physical synthesis, formal verification, and static timing analysis using the Syno