Introduction The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as inter co

Extensive experiments demonstrate the feasibility of our method. We discuss extensions of our approach to other problems of VLSI design."

As fabrication technology keeps advancing, many deep submicron (DSM) effects have become increasingly evident and can no longer be ignored in Very Large Scale I

The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software