The Designer’s Guide to Verilog-AMS

The Designer’s Guide to Verilog-AMS
Author :
Publisher : Springer Science & Business Media
Total Pages : 281
Release :
ISBN-10 : 9781402080456
ISBN-13 : 140208045X
Rating : 4/5 (56 Downloads)

Book Synopsis The Designer’s Guide to Verilog-AMS by : Ken Kundert

Download or read book The Designer’s Guide to Verilog-AMS written by Ken Kundert and published by Springer Science & Business Media. This book was released on 2005-12-19 with total page 281 pages. Available in PDF, EPUB and Kindle. Book excerpt: The Verilog Hardware Description Language (Verilog-HDL) has long been the most popular language for describing complex digital hardware. It started life as a prop- etary language but was donated by Cadence Design Systems to the design community to serve as the basis of an open standard. That standard was formalized in 1995 by the IEEE in standard 1364-1995. About that same time a group named Analog Verilog International formed with the intent of proposing extensions to Verilog to support analog and mixed-signal simulation. The first fruits of the labor of that group became available in 1996 when the language definition of Verilog-A was released. Verilog-A was not intended to work directly with Verilog-HDL. Rather it was a language with Similar syntax and related semantics that was intended to model analog systems and be compatible with SPICE-class circuit simulation engines. The first implementation of Verilog-A soon followed: a version from Cadence that ran on their Spectre circuit simulator. As more implementations of Verilog-A became available, the group defining the a- log and mixed-signal extensions to Verilog continued their work, releasing the defi- tion of Verilog-AMS in 2000. Verilog-AMS combines both Verilog-HDL and Verilog-A, and adds additional mixed-signal constructs, providing a hardware description language suitable for analog, digital, and mixed-signal systems. Again, Cadence was first to release an implementation of this new language, in a product named AMS Designer that combines their Verilog and Spectre simulation engines.


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